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What is explicitly parallel instruction computing (EPIC)?
What is instruction level parallel processing?
Is instruction-level parallel pro-cessing a viable approach to achieving higher performance?
Can instruction-level parallel processing increase performance without rewriting applications?
Explicitly parallel instruction computing (EPIC) is a term coined in 1997 by the HP–Intel alliance to describe a computing paradigm that researchers had been investigating since the early 1980s. This paradigm is also called Independence architectures.
The Explicitly Parallel Instruction Computing (EPIC) style of architecture is an evolution of VLIW that has also absorbed many superscalar concepts, albeit in a form adapted to EPIC. EPIC provides a phi-losophy of how to build ILP processors, along with a set of architectural features that support this philoso-phy.
This report introduces the Explicitly Parallel Instruction Computing (EPIC) style of architecture, which was developed, starting eleven years ago, to enable higher levels of instruction-level parallelism without unacceptable hardware complexity.
The authors developed the Explicitly Parallel Instruction Computing (EPIC) style of architecture to enable higher levels of instruction-level-parallelism without unacceptable hardware complexity.
- M.S. Schlansker, B.R. Rau
- 2000
• Explicitly Parallel Instruction Computing – unlike early VLIW designs, EPIC does not use fixed width instructions....as many parallel as possible! • Programs must be written using sequential semantics – parallel semantics not supported – explicitly lay out the parallelism – eg: swapping of operands CS 211 EPIC: Key Concepts ...
The term EPIC (Explicitly Parallel Instruction Computing) was coined to describe the design philosophy and architecture style envisioned by HP, and the specific jointly designed instruction set architecture was named IA-64. More recently, Intel has preferred to use IPF (Itanium Processor Family) as the name of the instruction set architecture.
Feb 1, 2000 · The authors developed the Explicitly Parallel Instruction Computing (EPIC) style of architecture to enable higher levels of instruction-level parallelism without unacceptable hardware complexity.
