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Explicitly parallel instruction computing (EPIC) is a term coined in 1997 by the HP–Intel alliance to describe a computing paradigm that researchers had been investigating since the early 1980s. This paradigm is also called Independence architectures.
This is why we developed the Explicitly Parallel Instruction Computing (EPIC) style of architecture: to enable higher levels of instruction-level parallelism without unacceptable hardware complexity.
The term EPIC (Explicitly Parallel Instruction Computing) was coined to describe the design philosophy and architecture style envisioned by HP, and the specific jointly designed instruction set architecture was named IA-64. More recently, Intel has preferred to use IPF (Itanium Processor Family) as the name of the instruction set architecture.
History. Overview of key EPIC concepts. speculation, predication, register files. Introduction to Compiler Optimization. VLIW and EPIC. VLIW architectures progressed to EPIC. A quick look at “pure” VLIW approach. What Is VLIW? VLIW hardware is simple and straightforward, like SIMD machines.
EPIC (Explicitly Parallel Instruction Computing) - An ISA philosophy/approach e.g. CISC, RISC, VLIW - Very closely related to but not the same as VLIW IA-64 - An ISA definition e.g. IA-32 (was called x86), PA-RISC - Intel’s new 64-bit ISA - An EPIC type ISA Itanium (was code named Merced) - A processor implementation of an ISA e.g. P6, PA8500
Explicitly Parallel Instruction Computing (EPIC) refers to architectures in which features are provided to facilitate compiler enhancements of instruction-level parallelism (ILP) in all programs, while keeping hardware complexity relatively low.
Feb 1, 2000 · The authors developed the Explicitly Parallel Instruction Computing (EPIC) style of architecture to enable higher levels of instruction-level parallelism without unacceptable hardware complexity.
