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Boundary scan is a method for testing interconnects (wire lines) on printed circuit boards or sub-blocks inside an integrated circuit. Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage, or analyze sub-blocks inside an integrated circuit.
Boundary-scan, as defined by the IEEE Std.-1149.1 standard, is an integrated method for testing interconnects on printed circuit boards (PCBs) that are implemented at the integrated circuit (IC) level.
In this tutorial, you will learn the basic elements of boundary-scan architecture — where it came from, what problem it solves, and the implications on the design of an integrated-circuit device. The core reference is the IEEE 1149.1 Standard:
† “What to know about Boundary Scan” : A short introduction to the boundary scan. † “Configuration of the Boundary Scan Chain” : Describes how to set up a boundary scan chain and do basic checks.
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Boundary Scan: Advantages • It’s a standard! (IEEE 1149.1) – allows mixing components from different vendors – provides excellent interface to internal circuitry • Supported by CAD tool vendors, IC & FPGA manufacturers • Allows testing of board & system interconnect – back-plane interconnect test w/o using PCB functionality
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A quick understand of what is boundary scan testing using IEEE 1149.1 standards. Basic tutorial of boundary scan and its features. Choose a country or area to see content specific to your location
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Figure 4 shows a basic universal boundary-scan cell. It has four modes of operation: normal, update, capture, and serial shift. The memory element is shown to be a simple D-type flip-flop with front-end and back-end multiplexing of data.
