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VCK190 is the first Versal™ AI Core series evaluation kit, enabling designers to develop solutions using AI and DSP engines capable of delivering over 100X greater compute performance compared to current server class CPUs.
- Versal Prime Series Vmk180 Evaluation Kit
The Versal™ Prime series VMK180 evaluation board features...
- Virtex UltraScale+ FPGA Vcu118 Evaluation Kit
The Virtex UltraScale+ FPGA VCU118 Evaluation Kit is the...
- XQR Versal™ for Space 2.0 Applications
The XQR Versal is targeted for on board processing payload...
- Versal Premium Series with AI Engines
The Versal Premium series delivers industry-leading adaptive...
- Versal Prime Series Vmk180 Evaluation Kit
Dual-Core ARM Cortex-A72 Application Processors. ˃ Up to 1.7GHz for 2X single-threaded performance1 ˃ Cost and power optimized (half the power) ˃ Code compatibility (ARMv8-A architecture) ˃ Enables SW developers to start from a familiar place.
- 5MB
- 35
The XQR Versal is targeted for on board processing payload applications with a dramatic increase in compute density for vector-based algorithms, system logic cells, on-board SRAM and multi-gigabit transceivers as compared to previous space devices. The devices offer a processing sub-system, hard-wired peripherals
- 185KB
- 2
The Versal example design will show how to run AXI DMA standalone application example on VCK190 and intended to demonstrate the AXI DMA standalone driver which is available as part of the Xilinx Vivado and Vitis.
- Overview
- Processor Subsystems
- Peripherals and Interfaces
- Platform Management
- Runtime Software
- Development Tools
- Other Enhancements
- Summary
From a very abstract level, this is what a Versal device looks like: We can see the different blocks, like the Scalar Processing Engines, the Adaptable Hardware Engines, the Intelligent Engines, and a whole range of Advanced Protocol Engines. As a reminder, for Zynq UltraScale+, the high-level block diagram looks like this:
Now, lets have a more detailed look into the Scalar Processing System of Versal. In the heart we find a dual core ARM Cortex-72 subsystem, and a dual core ARM Cortex-R5 subsystem. Comparing this to the Zynq UltraScale+ (ZU+) Processing System, we see a couple of differences: 1. ZU+ has up to 4 ARM Cortex-A53 cores, versus a dual core Cortex-A72 in ...
Looking at the Processing System Peripherals, there are also a couple of differences: instead of 4 Ethernet MACs, there are 2, there is no GPU nor VCU in the currently available Versal devices, and there are no high speed peripherals available. From a boot device perspective, Versal devices can boot from Octal SPI now for improved boot time perform...
A new block in Versal is the Platform Management Controller (PMC). In ZU+ we have the Platform Management Unit (PMU) and the Configuration and Security Unit (CSU). These two embedded processing blocks have been combined into the PMC, and pulled out of the Processing System. This provides more flexibility and capabilites for the Versal Platforms. Th...
Comparing the Runtime Software for Versal and ZU+, they actually align pretty well. The main difference is at the very low level, where ZU+ uses the CSU and PMU, and the First Stage Bootloader is executed on one of the Processing Subsystems (R5 or A53). On Versal, this part is now completely handled by the PMC. On that PMC, the Platform Loader and ...
Both ZU+ and Versal can be configured using the Xilinx Vivado tool, and for software development use the Vitis Unified Software Platform,an eclipse based Software Development environment. Xilinx provides the necessary meta-layers for the easy integration in Yocto, as well as the Petalinuxtools as an easy entry point for Linux development on these d...
In addition to the discused differences in the architecture, there are many other enhancements on the embedded side of Versal. There have been many enhancements for functional safetey, and for security. For example: 1. The Physically Unclonable Function (PUF) features have been enhanced 2. The Temper Event Monitoring have been extended to detect vo...
As you can see, there have been many changes in the architecture, while keeping the toolflow and software stacks as similar as possible. With the new Platform Management Controller, a lot more flexibility and security features are possible, including new anti tamper monitoring options, improved crypto accelerators, etc. The Network on Chip allows v...
The Versal Premium series delivers industry-leading adaptive signal processing capacity by integrating AI Engines. While providing 4X signal processing capacity1 compared to previous generation FPGAs, the Versal Premium series also includes highly scalable serial bandwidth, power-optimized networking IP cores, and massive on-chip memory
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Versal ACAP Technical Reference Manual AM011 (v1.5) December 16, 2022 Xilinx is creating an environment where employees, customers, and partners feel welcome and included. To that end, we’re removing non-inclusive language from our products and related collateral. We’ve launched an internal initiative to remove language that could exclude
